Contradiction between high-quality pictures and low power consumption is a problem to be solved in the field of display. In the conventional technology, interlaced scanning is implemented within a frame of picture, and for pixels which are not needed to be charged, n frames of pictures are charged at one time, so as to achieve the purpose of energy conservation. The primary means is to connect an “AND gate” at a gate terminal, and control a state of the “AND gate” through a pulse, so as to achieve control of switching states for various rows, and thus achieve the purpose of interlaced scanning. At present, due to development of products in the display industry towards a Gate Driver On Array (GOA) direction, there is need to manufacture an “AND gate” on an array during manufacturing of a GOA. As a result, the process becomes complicated, which is not beneficial to improvements of production and yield of the products.